Regviz

NXP Semiconductors /QN908XC /FSP /FIR_CFG_CH1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as FIR_CFG_CH1

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/QN908XC/FSP/FIR_CFG_CH1#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FIR_CH1_COEF_BASE0FIR_CH1_TAP_LEN 0 (FIR_CH1_BUF_CLR)FIR_CH1_BUF_CLR

Description

FIR channel 1 configuration register

Fields

FIR_CH1_COEF_BASE

FIR channel 1 coefficient base address
FIR_CH1_TAP_LEN

FIR channel 1 tap length
FIR_CH1_BUF_CLR

FIR channel 1 buffer clear

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data